Understanding the USPTO’s Interpretation of 35 U.S.C. § 112 for Computer-Implemented Functional Claim Limitations
Patent practitioners, inventors, in-house counsel, and patent examiners alike have been clamoring for more guidance on computer-implemented functional claim limitations invoking § 112(f) since the Federal Circuit’s en banc Williamson v. Citrix decision in 2015. To help answer some of those pleas, the U.S. Patent and Trademark Office (USPTO) published a Federal Register notice on January 7, 2019 to address issues under 35 USC § 112. In the most recent Patent Quality Chat on June 11, 2019, Jeffrey West, Senior Legal Advisor, and Bob Bahr, Deputy Commissioner for Patent Examination Policy, spoke on this topic in a presentation entitled “Examining Computer-Implemented Functional Claim Limitations for Compliance with 35 U.S.C. § 112,” highlights of which are provided in this article. The USPTO has provided the presentation slides and a webinar video at their website.
The June chat featured a 30 minute presentation by Mr. West, followed by a 20 minute Q and A session with Mr. Bahr, with questions provided by the attendees. Mr. West broke his presentation up into two sections: a review of issues under 35 USC § 112(f) and 35 USC § 112(b) related to examination of computer-implemented functional claim limitations and a review of issues under 35 USC § 112(a) related to examination of computer implemented functional claim limitations.
During the walk-through portion, Mr. West discussed highlights of the Federal Register notice. Mr. West noted that the Federal Register notice did not include any changes to the USPTO’s § 112 examination process but rather reinforced good practices in claim interpretation and an evaluation of the § 112 requirements. The Federal Register notice coincided with USPTO examiner training which tried to ensure that computer implemented functional claim limitations are properly treated under 35 USC § 112(f) and to ensure that computer implemented functional claim limitations have patent proper written description and enablement support under § 112(a).
Mr. West reiterated the three-pronged analysis for identifying a section 112(f) claim limitation as recited in MPEP section 2181. Under prong one, the claim limitation is analyzed to determine whether the limitation uses the term “means” or a term used as a substitute for means as a generic placeholder (also called a “nonce term” or a “non-structural term” having no specific structural meaning) for performing the claimed function. Use of the term “means” triggers a presumption that § 112(f) applies. Under the second prong, the examiner determines whether the term “means” or the generic placeholder is modified by functional language that is typically, but not always, linked to the transition word “for” (e.g., “means for”) or another linking word or phrase such as “configured to” or “so that.” Under the third prong, the examiner determines whether the term “means” or the generic placeholder is not modified by sufficient structure, material, or acts performing the claimed function. Mr. West also noted that if § 112(f) applies and a claim limitation performs a specific computer function, the specification must disclose an algorithm for performing the claimed specific computer function.
Mr. West then discussed rejections related to § 112(f) analysis, namely, § 112(a) written description and enablement rejections and § 112(b) indefiniteness rejections. For computer implemented limitations under § 112(a) written description analysis, examiners are instructed to determine whether the specification discloses the computer and the algorithm(s) that achieve the claimed function in sufficient detail that one of ordinary skill in the art can reasonably conclude that the inventor possessed the claim subject matter at the time of filing. It is not enough that one skilled in the art could theoretically write a program to achieve the claimed function, rather the specification itself must explain how the claimed function is achieved. Under the § 112(a) enablement requirement, the specification must teach those skilled in the art how to make and use the full scope of the claimed invention without undue experimentation.
During the Q and A session, attendees routinely asked about examiner training and difficulties with examiners regarding § 112 rejections. Highlights of information shared during the Q and A include:
Examiners were trained in January 2019 regarding the Federal Register notice, but the USPTO is trying to schedule further training later this year. The USPTO is still monitoring to see if training was effective or brought about any changes.
Mr. West noted that many examiner questions during training involved claim interpretation and how much disclosure is needed to satisfy the algorithm and/or structure requirements. Mr. West encouraged practitioners to err on the side of caution when describing algorithms and structure in patent specifications sufficient to satisfy written description and enablement requirements under § 112(f) analysis.
Mr. Bahr noted that the § 112 Federal Register notice was published the same day as a § 101 Federal Register notice providing revised subject matter eligibility guidance. Mr. Bahr explained that some issues raised under § 101 were better dealt with under § 112 analysis, and in order to provide a complete answer to both the subject matter eligibility and the § 112 questions, the patent office released both Federal Register notices on the same day with the hope that the § 112 Federal Register notice would reduce some of the § 101 issues seen by the patent office. Additionally, Mr. Bahr encouraged practitioners to submit comments regarding the § 101 and § 112 Federal Register notices.